Seminario Dev Tools 2019
Madrid, 2 de Abril
Este evento organizado por Doymus, empresa especializada en ofrecer productos y servicios que cubren prácticamente la totalidad de la Ingeniería de Sistemas e Ingeniería de Software, le dará un perspectiva privilegiada sobre el ciclo de vida del software embebido de mano de fabricantes especializados. A lo largo del seminario, podrá:
- Reurnirse con expertos y fabricantes
- Conocer nuevas herramientas y servicios
- Ver Demostraciones en Directo
Lugar del evento
Avda Valdelaparra, 2
28100 Alcobendas, Madrid
Tlf.: (+34) 91.787.45.45
- Parking Gratuito
Shuttle Bus Gratuito al aeropuerto de Barajas y Plaza de Castilla (Lunes a Viernes de 7 a 23 horas)
- Habitaciones a precios reducidos
Contactar con Visure para más información y reservas
Acceso en Coche
Perfectamente conectado, a través de las autovías radiales M-30 y M-40, con el Aeropuerto de Barajas (10 minutos).
Situado en la salida 16 de la A1 (Autovía del Norte - Burgos) en ambos sentidos.
Acceso en transporte público
Metro: Línea 10, estación "Marqués de la Valdavia" salida Paseo de la Chopera.Línea 10: directa a estación de tren de Chamartín
Conexión con Línea 8: Aeropuerto de Madrid Barajas
Conexión con Línea 1: Estación de tren de Atocha
Cercanias: Estación "Valdelasfuentes" de Alcobendas. Conexión con el centro de Madrid "Sol" en 30 minutos.
Autobuses: 157c Conexión con Estación "Valdelasfuentes" y con Plaza de Castilla
Detalle de las ponencias
Closing the gap between Requirements and Testing for Embedded Systems
In Embedded Systems, especially for safety-critical applications companies are mandated to follow software-safety standards such as ISO 26262, IEC 62304, GAMP5, FMEA, IEC 61508, CENELEC EN 50128, DO-178B/C and DO-254. In these environments, the traceability plays a fundamental role not only from requirements down to source code but also from these elements to the testing of the embedded software, in order to demonstrate that the whole system has been tested.
For software components, we define system, high- and low-level software requirements, implemented in different software coding units. Each low-level requirement will be tested and verified with the corresponding test procedures and test cases that for embedded application must be executed on both host and target environments in test campaigns that collect test results.
Visure Requirements Management Platform is comprehensive ALM solution that supports all this process including Requirement Management, Risk Management, Traceability Management all the way to the source code and test cases, Test Management, Requirements Quality Management, issue and bug tracking Management, Collaboration Management and Certification Management.
More details can be found on: https://visuresolutions.com/
The Vector Test Solution - An integrated test approach along the V-Cycle (combination of CANoe, vTestStudio, VT System, VectorCAST)
There are a lot of testing suites focused on unit testing or getting coverage of any kind of test cases, but there are very few testing suites that cover the full range of testing.
In the presentation, we will describe the Vector approach, that includes Test Design, Test Simulation, Test Execution and Test Reporting, ranging from unit testing, SW Integration Testing, HW/SW Integration Testing and System Testing. The solution, composed by SW and HW packages, includes the possibility to simulate the behaviour of the system (using Matlab/Simulink or Labview models), the behaviour of the external sub-systems or interact with simulated external sub-systems (analog & digital I/O, communication interfaces (RS-232, RS-488, Ethernet, FlexRay, CAN, etc.) or interact with real external sub-systems.
Finding the Worst-Case Execution scenario (WCET) on multi-more processors
Violating timing constraints on embedded applications can have severe consequences for the functional behavior of the application. A malfunctioning system can cause unreasonable risk to life and property and must be avoided.
Traditional approaches like dynamic end-to-end measurements are expensive, the test-end criterion is not clear and cannot provide worst-case guarantees.
While we propose for the timing predictable (single-core) processors a pure static program analysis approach (using AbsInt's aiT technology) for the high-end multi-core systems we recommend to use TimeWeaver, an Hybrid WCET analyzer that combines sophisticated static program analysis techniques (like the worst-case path analysis) with non-intrusive tracing.
TimeWeaver reads in the fully linked ELF executables, a list of task/functions entry points and program flow traces (like PowerPC NEXUS BTM/BHM traces) produced non-intrusively via trace units on the modern embedded processors. It extrapolates the maximum instruction timings and finds a worst-case execution scenario from the defined task entry to any possible end point taking also into account effects from multi-core interferences. TimeWeavers WCET result can be used for timing verification or optimization (i.e. identify timing bottlenecks) in the considered code. An automatic tool qualification according to ISO 26262, DO-178B/C, IEC-61508 is possible.
More details can be found on: http://www.absint.com/timeweaver
Image-Based Testing: Validating text using OCR Technology
Sometimes is difficut to validate GUI objects, specially when we have images, infographic symbols or embedded text on images. You need an advanced object recognition functionality in order to be able to automatize the testing.
Squish has improved those techniques and offer a really advanced method for object recognition and text extraction from images.
There will be some examples of usage of that technique and how to build test cases with this capability.
More details can be found on: https://www.froglogic.com/news/squish-gui-tester-6-4-release-with-cutting-edge-object-recognition-features/
How to verify Complex Electronic Hardware (FPGAs, SoC) under DO-254 safety standard
Depending on the DO-254 level, you don't need HW Detailed Design and testing can be only functional black box testing. But for Level A and B, you are required to verify the Detailed Design and perform white box testing into the SoC.
In that cases, it's important to have an experienced verification strategy that allow to reduce the verification effort for the more complex SoC.
This presentation will show how to fulfill the verification planing and tracking, including verification execution, debug and reporting
More details can be found on: https://www.hdl-dh.com/services/complete-soc-verification/
José Luis March Cabrelles
Qualifying embedded compilers and detecting vulnerabilities
Compilers are 'just' tools in any functional safety standards. They need the highest qualification levels, however are really difficult to qualify. Developers prefer to do on-target application testing over compiler qualification. This does however not take into account the complexity of a compiler and the artifacts it introduces in the generated code, not to mention who has responsibility for the correctness of an open source compiler.
In 2008, a buffer overflow bug was detected in a function that perfoms domain-name lookups in the GNU C Library. In 2017, a vulnerability codenamed Devil's Ivy was detected in gSOAP, a C/C++ library. There were some other important vulnerabilities discovered in the last years.
The presentation will discuss compiler qualification according to a functional safety standard, the impact of optimizations on source code coverage and code coverage of the compiler itself.
More details can be found on: https://solidsands.nl/supertest
Requirements ALM Platform
Visure Requirements provides unique features for Requirements Management, Test Management, Defect and Issue Tracking, Change Management and Risk Management, all in one, single platform.
Providing configuration management, version tracking and baselining for all the artifacts, Visure Requirements becomes one of the most comprehensive solutions in the market.
Having all artifacts represented in one platform enables end-to-end traceability, from requirements all the way down to source code through tests, defects, change requests and tasks.
Traceability in Visure Requirements is guaranteed to be consistent and users can check the full coverage of the artifacts each step of the way.
Change Impact Analysis, Coverage Analysis and Traceability Matrix are one-click away.
Reports & Dashboards
Visure Requirements provides comprehensive features to display the right information at the right time in the right format, whether that's a dashboard to display coverage analysis, a specification deliverable in Word or PDF for your customer, or a traceability matrix in Excel to provide the authorities.
Visure Requirements links specific tests with the requirements they validate. It then manages the relationships, identifying which requirements have and have not been tested and pinpointing those tests that need to be re-run due to changes in the requirements. This automates the manual process, saving time, increasing software quality, and providing the transparency required to obtain certification.
MS Word and Excel Synchronization
We know how important it is to be able to deal with MS Word and MS Excel documents provided by customers, or even internal teams that are not yet fully on board with the Requirements tool of choice. That's why we provide a round-trip between Visure Requirements and MS Office so that users can synchronize their MS Office documents with Visure Requirements, flagging each time all the elements that have been modified in the document, and synchronizing these changes back into Visure Requirements.
Visure Requirements provides reusability support, to enable simple sharing of standards across projects, or complex product line and variant management. Either case, Visure Requirements allows the definition of a catalog of reusable components which may be reused to create or update variants. This is a critical capability that accelerates time to market and cuts development costs.
Templates for Standards Compliance
Visure Requirements' out-of-the-box project templates for standard compliance help customers configure a new project compliant with the following standard in less than 2 minutes:
- Aerospace and defense: DO-178B/C and DO-254
- Automotive: ISO 26262 and Automotive SPICE
- Medical devices: IEC 62304 and FMEA
- Railway: CENELEC EN 50128 and FMEA
- Agile: SCRUM
- Systems engineering (CMMI, SPICE, EN 61508)
Visure Requirements provides live integrations that enable the synchronization of items bidirectionally with tools such as JIRA, Enterprise Architect, HP ALM, and many other.
Trusted by some of the best companies
Visure Solutions named Gold Medalist in ALM space
Software Reviews, a division of world-class research and advisory firm Info-Tech Research Group Inc., published its Application Lifecycle Management Data Quadrant Awards naming Visure Solutions Gold Medalist in the space.